Digital Logic Test 1

A̅⋅B + A.B̅ + A.B

= A̅ . B + A(B̅ + B)

∵ B̅ + B = 1

= A̅.B + A

∵ x + yz = (x + y).(x + z)

= (A + A̅).(A + B)

= (A + B)

• Functionally complete operations set is a set of logic functions from which any arbitrary Boolean logic function can be realized.
• Examples of functionally complete operation set are:

1. OR gate, NOT gate 
2. AND gate, NOT gate
3.  NOR gate
4. NAND gate
5.  2:1 MUX

• Any super-set of the above examples will also form a functionally complete operations set.

Explanation:

Option 2: AND gates, XOR gates and 1

A ⊕ B = AB̅ + A̅.B

F(A, B) = AB̅ + A̅.B 

By taking  B = 1

F(A, 1) = A1̅  + A̅.1 = A̅ 

AND gate, NOT gate are functionally complete operations set.

Functionally complete operations set is sufficient to implement any arbitrary Boolean function

Concept:

Range of numbers in 2’s complement form with n bit: - 2^n-1 to + (2^n-1 - 1)

Range of numbers in signed form with n bit: (- 2n-1  - 1) to + (2n-1 - 1)

Calculation:

For 2’s complement

- 2n-1 ≤ -128

 2n-1 ≥ 128 

2n-1⁼ ≥ 2⁷

n ≥ 7 + 1 ≥ 8

minimum value of n is 8.

For signed form:

- (2n-1 - 1) ≤ -128

 2n-1 ≥ 128  + 1 ≥  129

n ≥ 9

Therefore the minimum number of bits required to represent -12810 in 2's complement form and signed form respectively are

Concept: 

A decoder with k input lines has 2^k output lines.

Calculation:

The memory is byte-addressable. So 64 KB = 2¹⁶ B.

16 × 2¹⁶ decoders.

So, the number of input lines (p) = 16

Number of output lines (q) = 2^p = 2¹⁶ = 65536

∴ p + q = 16 + 65536 = 65552 

Decimal conversion → binary → Hexadecimal (4 bit)

Decimal conversion → binary → Octal (3 bit)

(ABCDEF98)₁₆ = (1010 1011 1100 1101 1110 1111 1001 1000)₂

(010 101 011 110 011 011 110 111 110 011 000)₂ = (25363367630)₈

Concept:

32-bit floating-point representation of a binary number in IEEE- 754 is

Calculation:

Binary number is

0 0110010 01101100000000000000000

Here, sign bit is 0. So, number is positive.

Exponent bits = E = 01100100 = 100 (in decimal)

Mantissa bits M = 01101100000000000000000

In IEEE-754 format, 32-bit (single precision)

(-1)^s × 1.M × 2^{E – 127}

= (-1)⁰ × 1. 011011 × 2^{100 – 127}

= 1. 011011 × 2^-27

= (1 + 2^-2 + 2^-3 + 2^-5 + 2^-6) × 2^-27

= 1.421875 × 2^-27

= 22.75 × 2^-31

\(\overline {P + \bar Q + PQ} = \overline {{\rm{P}} + \left( {{\rm{\bar Q}} + {\rm{Q}}} \right).\left( {{\rm{\bar Q}} + {\rm{P}}} \right)} \)

\({\rm{F}}\left( {{\rm{P}},{\rm{\;Q}}} \right) = \overline {{\rm{P}} + {\rm{\bar Q}} + {\rm{P\;}}} = {\rm{\bar P}}.{\rm{Q}}\)

\({\rm{F}}\left( {{\rm{M}},{\rm{\;\bar N}}} \right) = {\rm{\bar M}}.{\rm{\bar N\;}}\)

a ⊙ b = a̅b̅ + ab

a ⊕ b = a̅b + ab̅

a̅ ⊕ b̅ = ab̅ + a̅b = a ⊕ b

a ⊙ b̅ = a̅b + ab̅ = a ⊕ b

a̅ ⊙ b = ab̅ + a̅ b = a ⊕ b

a ⊕ b̅ = a̅b̅ + ab = a ⊙ b

\(A +A\bar B+AB\bar C = A(1+\bar B+B\bar C) = A.1 =A\)

Hence we can simply take A as output and ignore all other inputs.

(146)_b + (313)_b-2 = (246)₈

b² + 4b + 6 + 3(b-2)² + (b-2) + 3 = 2× 8² + 4×8 + 6

4b² – 7b + 19 = 166

 4b² – 7b – 147 = 0

4b² – 28b + 21b – 147 = 0

4b(b –  7) + 21(b – 7) = 0

(b – 7).(4b + 21) = 0

∴ b = 7 or b = -21 ÷ 4

Since b cannot be negative or in fraction

∴ b = 7

Alternate Method:

Substitute and check the result

b = 7

(146)₇ + (313)_7-2 = (246)₈

LHS = (146)₇ + (317)_7-2

 (146)₇ = 1 × 7² + 4 ×7¹ + 6 × 7⁰ = 49 + 28 + 6 = (83)₁₀

(313)₅ = 3 × 5² + 1 × 5 + 7× 5⁰ = 75 + 5 + 3 = (83)₁₀

LHS = (83)₁₀ + (83)₁₀ = (166)₁₀  

RHS = (246)₈

= 2 × 8² + 4 ×8¹ + 6 × 8⁰

= 128 + 32 + 6 = (166)₁₀  

Concept:

 In IEEE- 754 single precision format, a floating-point number is represented in 32 bits.

Sign bit value 0 means positive number, and 1 means a negative number.

The floating-point number can be obtained by formula: ± 1. M × 2^(E-127)

Data:

Content of R1: 0x 42200000               (0x means Hexadecimal notation)

Content of R2: 0x C1200000

Calculation:

Content of R1 in Hex (0x) is 42200000. After converting into binary, it can be represented in IEEE- 754 format as:

Sign bit is 0 i.e. the number is positive

Biased Exponent (E’) = 100 0010 0 = 132

Normalized Mantissa (M) = 010 0000 0000 0000 0000 0000 = .25

Therefore, the number in register R1 = + 1.25 * 2^(132-127) = 1.25 × 32 = 40

Content of R2 in Hex (0x) is C1200000. After converting into binary, it can be represented in IEEE- 754 format as:

Sign bit is 1 i.e. the number is negative

Biased Exponent (E’) = 100 0001 0 = 130

Normalized Mantissa (M) = 010 0000 0000 0000 0000 0000 = .25

Therefore, the number in register R1 = - 1.25 * 2^(130-127) = -1.25 * 8 = -10

R3 = R1/R2 = 40/-10 = -4

Since the number is negative, Sign bit (MSB) = 1

Converting 4 into binary of a floating point gives: (100.0)₂

Representing it into normalized form gives:  (1.000000….) × 2²

Therefore, Mantissa is 23 bits of all 0s

Biased Exponent (E’) = E+ 127 = 2+127 = 129 = (10000001)₂

It can be represented in IEEE- 754 format as:

Converting it into Hex format gives: 0x C0800000

Concept:

 Output of T flip flop will change when T = 1 and remain same when T = 0

Excitation table for T flip flop

From this table, 

T0 = 0

T1 = Q̅1.Q̅0 + Q1Q0 = Q1 ⊙ Q0

n bit Up-counter counts from 0 to 2ⁿ – 1

x > y

From x to 2ⁿ – 1 number of pulses needed = (2ⁿ – 1) – x

From 2ⁿ – 1 to 0 number of pulses needed = 1

From 0 to y umber of pulses needed = y – 0 = y