Digital Electronics Test 4

Concept:

The resolution of DAC is given by:

\(\frac{{{V_{Ref}}}}{{{2^N}}}\)

Calculation:

Given n-bit DAC has 1 mV steps

\(1\;mV = \frac{{5V}}{{{2^N}}}\)

\(1\;mV = \frac{{5000}}{{{2^N}}}mV\)

\({2^N} = \frac{{5000\;mV}}{{1\;mV}}\)

2^N = 5000

N = 13

The resolution of a 4-bit counting ADC = 0.5 V

That means the voltage corresponding to each count = 0.5 V

For an input of 5.1 V, the number counts that counter will count

\(= \frac{{5.1}}{{0.5}} = 10.2 \approx 1\) 

Digital output = 1011

Maximum conversion time = (2ⁿ - 1) T_clk

Clock frequency (f) = 0.5 MHz

\({T_{clk}} = \frac{1}{f} = \frac{1}{{0.5\; \times \;{{10}^6}}} = 2\;\mu s\) 

Maximum conversion time = (2⁴ - 1) × 2 μs = 30 μs  

The resolution of an n-bit ADC is given by

\(= \frac{V}{{{2^n} - 1}}\) 

Given that, V = 15 V

Resolution = 0.1 V

\(\Rightarrow 0.1 = \frac{{15}}{{{2^n} - 1}}\) 

⇒ 2ⁿ = 151

⇒ n = 8, as n should be integer.

In a flash converter, the number of comparators required

= 2ⁿ – 1 = 2⁸ – 1 = 255

The output voltage for the input of 011100 is

\(= 5\left[ {0 \times \frac{1}{2} + 1 \times \frac{1}{{{2^2}}} + 1 \times \frac{1}{{{2^3}}} + 1 \times \frac{1}{{{2^4}}} + 0 \times \frac{1}{{{2^5}}} + 0 \times \frac{1}{{{2^6}}}} \right]\)

\(t = \frac{{3\pi }}{{100}} \times {t_1} = \frac{{3\pi }}{{100}} \times 50 = 4.71\;msec\)

Error due to this period = RC/t × 100

\( = \frac{{0.047 \times {{10}^{ - 6}} \times 1 \times {{10}^3}}}{{4.71 \times {{10}^{ - 3}}}} \times 100\)

= 1%

In an ADC along with sample and hold circuit, for avoiding error at output, voltage of capacitor should be not drop by more than ± Δ/2

\({\rm{\Delta }} = \frac{{10}}{{{2^{10}} - 1}} = 9.77 \times {10^{ - 3}}V\)

Δ/2 = 4.88 × 10³ V

Maximum conversation time for the ADC is

\(t = \frac{{\frac{{{\rm{r\Delta }}}}{2}}}{{drop\;rate}} = \frac{{4.88 \times {{10}^{ - 3}}V}}{{100 \times {{10}^{ - 4}}V/msec}}\)

= 48.87 msec ≈ 49 msec