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Electronic Devices Test 3

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Electronic Devices Test 3
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  • Question 1
    1 / -0
    Under the application of bias in a typical p-n junction structure, the hole current contribution is around 40% of the total current. As a designer, what will you do to increase this hole current contribution to 80%?
    Solution

    Concept:

    For a forward bias applied at the PN-junction, the total currently density is given as:

    \(J = {J_s}\left( {{e^{\frac{{{V_a}}}{{{V_T}}}}} - 1} \right)\)

    Js = saturation current density calculated as:

    \({J_s} = \left[ {\frac{{e{D_p}{p_{n0}}}}{{{L_p}}} + \frac{{e{D_n}{n_{p0}}}}{{{L_n}}}} \right]\)

    pn0 = minority carrier holes on n-side

    np0 = minority carrier electrons at the p-side.

    This can also be written as:

    \({J_s} = \left( {\frac{{e{D_p} \cdot n_i^2}}{{{L_p} \cdot {N_d}}} + \frac{{e\;{D_n} \cdot n_i^2}}{{{L_n}{N_a}}}} \right)\)     ---(1)

    The above equation can be written as:

    Js = Jsp + Jsn

    Jsp = contribution of current because of holes.

    Jsn = contribution of current because of electrons.

    Now, the contribution of hole current (Jsp) from Equation (1) can increase in one of the two ways:

    1) Reducing n-donor concentration (Nd).

    2) Increasing the acceptor donor concentration (Na). This will reduce the minority carrier electrons, which will result in a decrease in current contribution because of electrons

    ∴ Both (1) and (2) are correct.

  • Question 2
    1 / -0

    Two p-n junction diodes D1 and D2 are identical in all respects except that the width of the n-region in D2 is double that in D1. If the current in D1 is 1 mA at a forward bias of 0.6 V, the current in D2 at 0.625 V bias will be_________ (in mA).

    (Take VT = 25 mV)

    Solution

    Concept:

    The current-voltage Relationship in a diode is:

    \(i = {I_o}{e^{{V^{BE}}/{V_T}}}\)

    where Io is the reverse saturation current

    and Io ∝ Area of the cross-section

    Io ∝ width

    Calculation:

    At a bias of 0.6V in D1:

    \(1mA = {I_{01}}{e^{0.6/{V_T}}}\)   ---(1)

    Since the Width of D2 is double the width of D1:

    I02 = 2I01 

    Now, for a bias of 0.625 V in D2

    \({I_2} = 2{I_{01}}{e^{\frac{{0.625}}{{{V_T}}}}}\)

    The above equation can be written as:

    \({I_2} = 2\left[ {{I_{01}}{e^{0.60/{V_T}}}.{e^{0.025/{V_T}}}} \right]\)

    Using Equation (1), the above equation becomes:

    \({I_2} = 2\left( {1mA} \right){e^{0.025/{V_T}}}\)

    I2 = 2mA (e1) = 5.436 mA 

  • Question 3
    1 / -0

    The correct statement regarding depletion and diffusion capacitance is

    i) Depletion capacitance is dominant in reverse-bias voltage

    ii) Diffusion capacitance is dominant in reverse-bias voltage

    iii) The diffusion capacitance is due to stored charge of minority electrons and minority holes near the depletion region

    iv) Depletion capacitance is directly proportional to width of depletion region

    Solution

    Diffusion capacitance:

    • Diffusion capacitance is due to the transfer of minority carries during forward-bias.
    • The minority carries diffuse from one end of the junction to another, causing variation of charge with applied voltage.
    • This leads to capacitance, it is present only in forward bias and is significantly higher than depletion capacitance in the forward bias.

     

    Depletion Capacitance:

    Depletion capacitance is calculated as:

    \({C_D} = \frac{{\varepsilon A}}{W}\)    ---(1)

    W = Width of the depletion region given by:

    \(W = {\left[ {\left[ {\frac{{2\varepsilon }}{q}\left( {\frac{1}{{{N_A}}} + \frac{1}{{{N_D}}}} \right)} \right]\left( {{V_{bi}} - V} \right)} \right]^{1/2}}\)      ---(2)

    Vbi = built-in potential

    V = Anode to cathode applied potential

    • Depletion capacitance is due to the storage of charges in reverse bias junction, which acts like parallel plate capacitance.
    • With forward-bias voltage, the depletion width decreases, which increases the depletion capacitance.
    • It is less than diffusion capacitance in forward-bias mode.
  • Question 4
    1 / -0

    A silicon n+p junction is biased at VR = 10 V. The doping in the p region increasing by a factor of 2. Neglecting the change in built-in potential, the percent change in the junction capacitance will be (correct up to two decimal places) ______.

    Solution

    Concept:

    Junction/depletion capacitance is calculated as:

    \({C_j} = \frac{{\varepsilon A}}{W}\)    ---(1)

    W = Width of the depletion region given by:

    \(W = {\left[ {\left[ {\frac{{2\varepsilon }}{q}\left( {\frac{1}{{{N_A}}} + \frac{1}{{{N_D}}}} \right)} \right]\left( {{V_{bi}} - V} \right)} \right]^{1/2}}\)      ---(2)

    Vbi = built-in potential

    Va = Applied Voltage from anode to cathode

    Substituting W from Equation (2) to Equation (1), we get:

    \({C_j} = \frac{{\varepsilon A}}{{{{\left[ {\frac{{2\varepsilon }}{q}\left( {\frac{1}{{{N_A}}} + \frac{1}{{{N_D}}}} \right)\left( {{V_{bi}} - V} \right)} \right]}^{1/2}}}}\)

    Application:

    Since we have n+p junction, we have:

    Nd ≫ Na

    The junction capacitance is approximated as:

    \({{C}_{j}}=\sqrt{\frac{e~\epsilon {{N}_{a}}{{N}_{d}}}{2\left( {{V}_{bi}}+{{V}_{R}} \right)\left( {{N}_{d}} \right)}}\)

    \({{C}_{j}}=\sqrt{\frac{e\epsilon {{N}_{a}}}{2\left( {{V}_{bi}}+{{V}_{R}} \right)}}\)     ---(1)

    For Na’ = 2 Na, neglecting the change in built-in potential, the new depletion capacitance can be approximated as:

    \({{C}_{j}}\left( 2{{N}_{a}} \right)=\sqrt{\frac{e\epsilon \left( 2{{N}_{a}} \right)}{e\left( {{V}_{bi}}+{{V}_{R}} \right)}}\)       ---(2)

    Diving Cj(2Na) with Cj, we get:

    \(\frac{{{C}_{j}}\left( 2{{N}_{a}} \right)}{{{C}_{j}}}=\sqrt{2}\)

    \(\frac{{{C}_{j}}\left( 2{{N}_{a}} \right)}{{{C}_{j}}}=1.424\)

    Now, the percentage change in junction capacitance will be:

    \(\frac{{{C}_{j}}\left( 2{{N}_{a}} \right)-{{C}_{j}}}{{{C}_{j}}}\times 100\)

    \(=\frac{1.414-1}{1}\times 100\)

    = 41.4%

  • Question 5
    1 / -0
    Two p-n junction diodes D1 and D2 are identical in all respects except that D1 is made up of wider bandgap material than D2. The reverse saturation current will be minimum for:
    Solution

    Concept:

    The reverse saturation current is given by:

    \({I_o} = A.q.n_i^2\left[ {\frac{{{D_p}}}{{{L_P}{N_D}}} + \frac{{{D_n}}}{{{L_n}{N_A}}}} \right]\)

    \({I_o} \propto n_i^2\;\)

    Also,

    \(n_i^2=N_cN_ve^{-{\frac{E_g}{KT}}}\)

    \(n_i^2 \propto {e^{ - \frac{{{E_g}}}{{{KT}}}}}\;\)

    Diode for which Eg/KT will be more will have less ni and subsequently will have less reverse saturation current.

    Observation:

    Value of Eg/KT for:

    1) D1 at 100°C  = Eg1/(0.032)

    2) D1 at 30°C = Eg1/(0.026)

    3) D2 at 100°C = Eg2/(0.032)

    4) D1 at 30°C = Eg2/(0.026)

    Given that Eg1 > Eg2

    Hence the reverse saturation current I0 will be minimum for D1 operating at 30°C 

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