Digital Electronics Test 5

Result

Digital Electronics Test 5

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Weekly Quiz Competition

Question 1
1 / -0

The resolution of a DAC is 'R' bits and the maximum output of a DAC is V volts. The weight of the most significant bit is

A
\(\frac{V}{{\left( {{2^R} - 1} \right)}}\)

B
\(\frac{{\left( {{2^{R - 1}}} \right)V}}{{{2^R} - 1}}\)

C
(2^R-1) V

D
\(\frac{V}{{{2^{R - 1}}}}\)

Solution

Step size (resolution) in DAC (R, no; of bits)
The analog output is written as
\({V_0} = \frac{V}{{{2^R} - 1}}\left( {{2^{R - 1}}{b_{r - 1}} + {2^{R - 2}}{b_{R - 2}} \pm - - - - - - {b_0}} \right)\)
∴ weightage of m.s.b is \(\frac{{\left( {{2^{R - 1}}} \right)V}}{{{2^R} - 1}}\)
Question 2
1 / -0

An n-bit DAC is desired to change in 1 mV increments while using a reference voltage of 5 V. The number of bits ‘n’ required for the DAC is _______.

A
13-13

B
134-131

C
137-136

D
139-132

Solution

Concept:
The resolution of DAC is given by:
\(\frac{{{V_{Ref}}}}{{{2^N}}}\)
Calculation:
Given n-bit DAC has 1 mV steps
\(1\;mV = \frac{{5V}}{{{2^N}}}\)
\(1\;mV = \frac{{5000}}{{{2^N}}}mV\)
\({2^N} = \frac{{5000\;mV}}{{1\;mV}}\)
2^N = 5000
N = 13
Question 3
1 / -0

A 10-bit ADC with a full scale output voltage of 10.24 V is designed to have a ± LSB/2 accuracy. If the ADC is calibrated at 25°C and the operating temperature ranges from 0°C to 50°C. Then the maximum net temperature coefficient of the ADC should not exceed.

A
± 200 μV/°C

B
± 400 μV/°C

C
± 600 μV/°C

D
± 800 μV/°C

Solution

Accuracy \(= \pm \frac{{LSB}}{2} = \pm \frac{1}{2}\frac{{{V_{FS}}}}{{{2^n}}} \)
\(= \pm \frac{1}{2}\frac{{10.24}}{{{2^{10}}}} = \pm 5\;mV\)
Maximum net temperature coefficient will be:
\(= \frac{{ \pm 5 \times {{10}^{ - 3}}}}{{25^\circ }} = \pm 200\mu V/^\circ C\)
Question 4
1 / -0

For a 10 bit digital ramp ADC using 500 kHz clock, the maximum conversion time is – (in μsec)

A
2046-2046

B
20464-20461

C
20467-20466

D
20469-20462

Solution

The maximum conversion time of ramp type ADC is given by:
(2ⁿ – 1).T
Since the frequency is the inverse of the time period, we can write:
\(\begin{array}{l} = \left( {{2^n} - 1} \right).\frac{1}{f}\\ = \left( {{2^{10}} - 1} \right) \times \frac{1}{{500 \times {{10}^3}}} = 2046\;\mu s \end{array}\)
Question 5
1 / -0

A signal channel signal acquisition system with 0-10 V range consist of a sample and hold circuit with worst case drop rate of 100 μV/ms and 10 bit ADC. The maximum conversion time for the ADC is

A
49 ms

B
0.49 ms

C
4.9 ms

D
490 ms

Solution

In an ADC along with sample and hold circuit, for avoiding error at output, voltage of capacitor should be not drop by more than ± Δ/2
\({\rm{\Delta }} = \frac{{10}}{{{2^{10}} - 1}} = 9.77 \times {10^{ - 3}}V\)
Δ/2 = 4.88 × 10³ V
Maximum conversation time for the ADC is
\(t = \frac{{\frac{{{\rm{r\Delta }}}}{2}}}{{drop\;rate}} = \frac{{4.88 \times {{10}^{ - 3}}V}}{{100 \times {{10}^{ - 4}}V/msec}}\)
= 48.87 msec ≈ 49 msec