Semiconductor Electronics: Materials, Devices and Simple Circuits Test 1

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Semiconductor Electronics: Materials, Devices and Simple Circuits Test 1

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Question 1
1 / -0

The value of the resistor, $$R_S$$, needed in the DC voltage regulator circuit shown here, equals

A
$$\dfrac{(V_i+V_L)}{(n+1)I_L}$$

B
$$\dfrac{(V_i-V_L)}{n I_L}$$

C
$$\dfrac{(V_i+V_L)}{n I_L}$$

D
$$\dfrac{(V_i-V_L)}{(n+1)I_L}$$

Solution

Total current in resistance $$R_S$$$$I = nI_L + I_L = (n+1) I_L$$
Voltage across $$R_S$$ is $$ V_S = V_i - V_L$$

$$\therefore R_S =\dfrac{V_S}{I} = \dfrac{V_i - V_L}{(n+1) I_L}$$
Question 2
1 / -0

The logic circuit shown below has the input waveforms 'A' and 'B' as shown. Pick out the correct output waveform.

A

B

C

D

Solution

From the figure we can see the logic gate table of NOT and NOR gate
$$A$$ $$NOT \ gate(X)$$
1 0
0 1
0 1
1 0
1 0
0 1
0 1

$$B$$ $$NOT \ gate(Y)$$
1 0
0 1
1 0
0 1
1 0
0 1
1 0

$$X$$ $$Y$$ $$NOR \ gate$$
0 0 1
1 1 0
1 0 0
0 1 0
0 0 1
1 1 0
1 0 0
Question 3
1 / -0

The truth table given in figure represents:

A
AND - Gate

B
NOR - Gate

C
NAND - Gate

D
OR - Gate

Solution

OR gate has the property that output is one when any one of the inputs is one and zero only when all inputs are zero. From the truth table, it can be seen that the above two properties are satisfied.
Question 4
1 / -0

An experiment is performed to determine the $$I - V$$ characteristics of a Zener diode, which has a protective resistance of $$R = 100 \Omega$$, and a maximum power of dissipation rating of $$1 W$$. The minimum voltage range of the DC source in the circuit is

A
$$0-24 V$$

B
$$0-5 V$$

C
$$0-12 V$$

D
$$0-8 V$$

Solution

The circuit diode for a zener diode with a protective resistance is shown.

Applying KVL,
$$V = iR + V_D$$
$$V_D = V - iR = V-100i$$

Maximum power dissipated across the zener diode is given by:
$$P = V_Di = (V-100i)i = 1$$
$$\therefore 100i^2 - Vi + 1 \geq 0 $$
Current should be real, hence determinant is greater than zero.
$$\therefore V^2 > 400$$
$$V >20 V$$
Question 5
1 / -0

Identify the gate and match A, B, Y in bracket to check.

A
AND $$(A=1, B=1, Y=1)$$

B
OR $$(A=1, B=1, Y=0)$$

C
NOT $$(A=1, B=1, Y=1)$$

D
XOR $$(A=0, B=0, Y=0)$$

Solution

The given diagrams involve 2 gates.
The first 1 is an AND gate followed by a NOT Gate, with the compliment of the output of first gate used as an input to the other gate which is NAND gate as NOT gate.
We consider the 4 combinations
$$A = 1 , B = 1, AB = 1, (AB)' = 0, \bar{AB}=1, Y = 0$$
$$A = 1 , B = 0, AB = 0, (AB)' = 1, \bar{AB}=0, Y = 1$$
$$A = 1 , B = 0, AB = 0, (AB)' = 1, \bar{AB}=0, Y = 1$$
$$A = 0 , B = 0, AB = 0, (AB)' = 1, \bar{AB}=0, Y = 1$$
The above configuration represents that of an AND gate.
Question 6
1 / -0

Identify the semiconductor devices whose characteristics are given above in the order $$(a), (b), (c), (d):$$

A
Simple diode, Zener diode, Solar cell, Light dependent resistance

B
Zener diode, Simple diode, Light dependent resistance, Solar cell

C
Solar cell, Light dependent resistance, Zener diode, Simple diode

D
Zener diode, Solar cell, Simple diode, Light dependent resistance

Solution

Simple diode conducts only in forward bias. It does not conduct in reverse bias.
Zener diode conducts in forward bias. When reverse bias potential is increased, at a point zener breakdown occurs and then it behaves as a voltage regulator.
Solar cell current is composed of dark current and forward-bias current.
Resistance of LDR decreases with intensity of light.
Question 7
1 / -0

The combination of gates shown below yields

A
OR gate

B
NOT gate

C
XOR gate

D
NAND gate

Solution

$$\textbf{Hint}$$:
In the given figure NAND gate is a combination of AND and NOT gate. Use truth table and Demorgan's theorem.
$$\textbf{Step 1:Truth table for NAND Gate}$$
The output of AND gate is connected to the input of NOT gate. So, the output of NAND gate is opposite to AND gate.
We know the truth table of NAND gate is as follows where A and B are inputs, Y is the output:
A   B   Y
0   0   1
0    1    1
1     0   1
1     1    0
$$\textbf{Step2:Apply DeMorgan's theorem}$$
Here in the figure the input A and B are connected to a NOT gate and the output of both NOT gate is given to a NAND gate.
$$X=\overline{\bar{A}.\bar{B}}$$     $$(1)$$
Let us apply Demorgan's rule we get
$$\overline{A.B}=\bar{A}+\bar{B}$$
Let is substitute Demorgan's rule in equation $$(1)$$ we get
$$X=\bar{\bar{A}}+\bar{\bar{B}}=A+B$$
The resultant is an OR gate.
Thus option A is correct.
Question 8
1 / -0

If a,b,c,d are inputs to a gate and x is its output then as per the following time graph the gate is:

A
NOT

B
AND

C
OR

D
NAND

Solution

From the waveforms, output is 0 only when all four inputs are 0. When, any one of the inputs is 1, then the output is 1. This is valid only for OR gate.
Question 9
1 / -0

A Zener diode is connected to a battery and a load as shown. The currents $$I$$, $$I_Z$$ and $$I_L$$ are respectively

A
$$12.5 mA, 5 mA, 7.5 mA$$

B
$$15 mA, 7.5 mA, 7.5 mA$$

C
$$15 mA, 7.5 mA, 5 mA$$

D
$$12.5 mA, 7.5 mA, 5 mA$$

Solution

As long as the $$V_{in} $$ is greater than the zener Voltage $$10 V $$, the zener is in breakdown region and hence the voltage across the load remains constant. The series limiting resistance $$4k\Omega $$ limits the input current.
Current in load $$I_L = \dfrac{10}{2 \times 10^3 } = 5mA $$
Voltage drop across the $$4k\Omega$$ is $$60-10 = 50V $$
Hence $$ I = \dfrac{50}{4\times 10^3 } = 12.5 mA $$
Hence, $$I_Z = I - I_L = 12.5 - 5 = 7.5 mA $$
Question 10
1 / -0

Carbon, silicon and germanium have four valence electrons each. At room temperature which one ofthe following statements is most appropriate ?

A
The number of free conduction electrons is significant in C but small in Si and Ge

B
The number of free conduction electrons is negligibly small in all the three

C
The number of free electrons for conduction is significant in all the three

D
The number of free electrons for conduction is significant only in Si and Ge but small in C

Solution