Semiconductor Electronics: Materials, Devices and Simple Circuits Test 22

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Semiconductor Electronics: Materials, Devices and Simple Circuits Test 22

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Question 1
1 / -0

Consider a two-input AND gate of figure below. Out of the four entries for the Truth Table given here, the correct ones are

A
All

B
1 and 2 only

C
1, 2 and 3 only

D
1, 3 and 4 only

Solution

Truth table for AND gate:
A B C
0 0 0
0 1 0
1 0 0
1 1 1
Question 2
1 / -0

From the adjacent circuit, the output voltage is

A
$$10 V$$

B
$$100 V$$

C
$$90 V$$

D
zero

Solution

Here, Zener diode is connected parallel to the input voltage source. Zener diode is known as voltage regulating diode hence, the output voltage will be equal to the voltage across Zener diode i.e. $$10 V$$.
Question 3
1 / -0

A Truth table is given below. The logic gate having following truth table is
A B Y
0 0 1
1 0 0
0 1 0
1 1 0

A
NAND gate

B
NOR gate

C
AND gate

D
OR gate

Solution

From given truth table it is clear that, if any or all inputs are high the output is low, hence given truth table is for NOR gate.
Question 4
1 / -0

From the circuit shown below, the maximum and minimum value of zener diode current are :

A
$$6\ mA,\ 5\ mA$$

B
$$14\ mA,\ 5\ mA$$

C
$$9\ mA,\ 1\ mA$$

D
$$3\ mA,\ 2\ mA$$

Solution

The Zener diode acts as the voltage regulator in the circuit and the voltage supply is variable hence, excess of voltage over $$50\ V$$ will be across $$5 K\Omega$$ resistance.

Thus, minimum voltage across $$5 K\Omega$$ resistance is $$80\ V-50\ V = 30\ V$$

Current through $$5 K\Omega$$ resistance is $$I_1$$(say)

$$I_1 = \dfrac{30}{5000} = 6\ mA $$

Also, maximum voltage across $$5 K\Omega$$ resistance is $$120\ V-50\ V = 70\ V$$

Current through $$5 K\Omega$$ resistance is $$I'_1$$...(say)

$$I'_1 = \dfrac{70}{5000} = 14\ mA $$

Now, voltage across load resistance of $$10 K\Omega$$ is $$50\ V$$

Thus, current through $$10 K\Omega$$ will be
$$I_2 = \dfrac{50}{10000} = 5\ mA$$

Hence, maximum current through Zener diode is
$$I_z = I'_1 - I_2 = 14 - 5 = 9\ mA$$

Minimum current through Zener diode is
$$I_z = I_1 - I_2 = 6 - 5 = 1\ mA$$
Question 5
1 / -0

Boolean expression for the gate circuit shown below is

A
$$A + \bar{A} =1$$

B
$$A+1=1$$

C
$$A+A=A$$

D
$$A+0=A$$

Solution

The input $$A$$ directly goes into the OR gate and also first passes through NOT gate, giving another input of $$\bar{A}$$ to the OR gate.
$$A+\bar{A}=1$$ since atleast one of $$A$$ and $$\bar{A}$$ is $$1$$.
Question 6
1 / -0

In the given circuit, two input wave forms $$A$$ and $$B$$ are applied simultaneously. The resultant wave form at $$Y$$ is

A

B

C

D

Solution

The input waveform indicates the input signals as:
For $$A$$, $$(1,0,1,0)$$ and for $$B, (1,0,0,1)$$. Truth table for given logic is shown below.
Input Output
$$(1,1)$$ $$0$$
$$(0,0)$$ $$1$$
$$(1,0)$$ $$1$$
$$(0,1)$$ $$1$$
Question 7
1 / -0

Logic gate having an output of $$1$$ is

A

B

C

D

Solution

Logic gate OR is used for addition of the input signals and Logic gate AND is used for multiplication of the input signals. While, logic gates NOR and NAND are used to reverse the addition and multiplication of the input signals respectively. Hence, input signal in NAND gate (C) will yield output $$1$$.
Question 8
1 / -0

The input of $$A$$ and $$B$$ for the Boolean expression $$(\overline{A+B}).(\overline{A.B})=1 $$ is

A
$$0,0$$

B
$$0, 1$$

C
$$1,0$$

D
$$1,1$$

Solution

Given equation is: $$(\overline {A+B})(\overline {A.B})$$
A] For $$(0,0)$$
$$(\overline {A+B})(\overline {A.B}) = (\overline {0+0})(\overline {0.0})$$
$$(\overline {A+B})(\overline {A.B}) = (1)(1) = 1$$

B] For $$(0,1)$$
$$(\overline {A+B})(\overline {A.B}) = (\overline {0+1})(\overline {0.1})$$
$$(\overline {A+B})(\overline {A.B}) = (0)(1) = 0$$

C] For $$(1,0)$$
$$(\overline {A+B})(\overline {A.B}) = (\overline {1+0})(\overline {1.0})$$
$$(\overline {A+B})(\overline {A.B}) = (0)(1) = 0$$

D] For $$(1,1)$$
$$(\overline {A+B})(\overline {A.B}) = (\overline {1+1})(\overline {1.1})$$
$$(\overline {A+B})(\overline {A.B}) = (0)(0) = 0$$
Question 9
1 / -0

The output Y of the gate circuit shown in the fig is

A
$$\bar{A}+\bar{B}$$

B
$$\overline{\bar A + \bar B}$$

C
$$\overline{A+B}$$

D
A + B

Solution

Here, OR gate is followed by NOT gate hence, the addition of inputs will be reversed in output i.e. $$Y = \overline {A+B}$$
Question 10
1 / -0

The combinations of the NAND gates shown hereunder are equivalent to

A
an OR gate and an AND gate respectively

B
an AND gate and a NOT gate respectively

C
an AND gate and OR gate respectively

D
an OR gate and an NOT gate respectively

Solution

Truth tables for logic (1) and (2) are shown below:
Input Output
$$(0,0)$$ $$0$$
$$(1,0)$$ $$1$$
$$(0,1)$$ $$1$$
$$(1,1)$$ $$1$$

Input Output
$$(0,0)$$ $$0$$
$$(1,0)$$ $$0$$
$$(0,1)$$ $$0$$
$$(1,1)$$ $$1$$

The truth tables are equivalent to OR and AND gate.