Semiconductor Electronics: Materials, Devices and Simple Circuits Test 3

Result

Semiconductor Electronics: Materials, Devices and Simple Circuits Test 3

Score
-
out of -
Rank
-
out of -

TIME Taken - -

SHARING IS CARING

If our Website helped you a little, then kindly spread our voice using Social Networks. Spread our word to your readers, friends, teachers, students & all those close ones who deserve to know what you know now.

Weekly Quiz Competition

Question 1
1 / -0

The output (X) of the logic circuit shown in the figure will be

A
$$X=\bar{\bar{A}}.\bar{\bar{B}}$$

B
$$X=\overline{A.B}$$

C
$$X=A.B$$

D
$$X=\overline{A+B}$$

Solution

$$X=\bar{\bar{AB}}=A.B$$
Question 2
1 / -0

The increase in the width of the depletion region in a p-n junction diode is due to :

A
reverse bias only

B
both forward bias and reverse bias

C
increase in forward current

D
forward bias only

Solution

The increase in the width of the depletion region is due to the absence of the electrons and holes in the region. This occurs only in the case of the reverse bias only in a diode.
Question 3
1 / -0

What is the output Y in the following circuit when all the three inputs A, B, C are first $$0$$ and then $$1$$?

A
$$1,1$$

B
$$0,1$$

C
$$0,0$$

D
$$1,0$$

Solution

Here the gate P is a logic symbol of AND gate and Q is a NAND gate.
So, the output of P is $$Y_p=A.B$$ and the output of Q is
$$ Y=\bar{Y_p.C}$$
When $$A=0, B=0, C=0 \Rightarrow Y_p=0 , Y=\bar{0.0}=1$$
When $$A=1, B=1, C=1 \Rightarrow Y_p=1 , Y=\bar{1.1}=0$$
Question 4
1 / -0

The given electrical network is equivalent to:

A
NOT gate

B
AND gate

C
OR gate

D
NOR gate

Solution

If we put input as A=0 B= 0 then we are get out put as F=1
In similar way the following shown in the table are also true.
The resulting table is nothing but the truth table of NOR gate.
Hence option D is the correct answer.
Question 5
1 / -0

A Zener diode, having breakdown voltage equal to $$15\ V$$, is used in a voltage regulator circuit shown in figure. The current through the diode is

A
$$10\ mA$$

B
$$15\ mA$$

C
$$20\ mA$$

D
$$5\ mA$$

Solution

Voltage across zener diode is constant
$${ \left( i \right) }_{ 1k\Omega } = \displaystyle\dfrac { 15 V}{ 1k\Omega } = 15 mA$$

$${ \left( i \right) }_{ 250\Omega } = \displaystyle\dfrac { \left( 20-15 \right) V }{ 250\Omega } = \displaystyle\dfrac { 5V }{ 250\Omega } = \displaystyle\dfrac { 20 }{ 1000 } A = 20\ mA$$

$$\therefore { \left( i \right) }_{ Zener } = \left( 20-15 \right) = 5\ mA$$.
Question 6
1 / -0

In the given circuit, the voltage across the voltage across the load is maintained at 12V. The current in the zener diode varies from 0-50 mA. What is the maximum watage of the diode?

A
12 W

B
6 W

C
0.6 W

D
1.2 W

Solution

The voltage drop across the diode and the load are same because they are connected in parallel.
The maximum current through the diode is 50mA.
Thus, the maximum power dissipated in the diode will be 50mA times 12V = 0.6W
Question 7
1 / -0

When the input of a two input logic gate are 0 and 0, the output is 1. When the inputs are 1 and 0, the output is zero. The type of logic gate is

A
XOR

B
NAND

C
NOR

D
OR

Solution

The truth table for a NOR gate is as given.
It is a combination of OR and NOT gate.
The output out of an OR gate for both inputs 0 is 0.
The NOT gate would turn it into 1.
The output out of an OR gate for inputs 1 and 0 is 1.
The NOT gate would turn it into 0.

Therefore,the logic gate is NOR gate.
Question 8
1 / -0

The logic gate represented in given figure is

A
OR Gate

B
NOT Gate

C
NAND Gate

D
XOR Gate

Solution

$$P$$ is the output of the inputs signal $$A$$ and $$B$$ operating on a $$NOR$$ gate. Then the signal $$P$$ (A' and B') acts as input signal for the second $$NOR$$ gate to give the output $$Y$$.
Thus writing truth table for each step gives the table as shown above which resembles the truth table of an $$OR$$ gate for input signal $$A$$ and $$B$$ whereas the $$Y$$ as the output signal.
Question 9
1 / -0

The circuit as shown in figure, the equivalent gate is

A
NOR gate

B
OR gate

C
AND gate

D
NAND gate

Solution

Let the outputs of individual gates be labelled as X, Y and Z respectively starting from left to right. we have:
$$Z=\overline { Y } \\ Y=\overline { XX } =\overline { X } +\overline { X } =\overline { X } \\ X=\overline { A+B } \\ \Rightarrow Z=X=\overline { A+B } $$.
Thus, the combination behaves as NOR gate.
Question 10
1 / -0

A hole is

A
a positively charged electron.

B
an electron in the valence band.

C
an unfilled covalent bond.

D
an excess electron in covalent bond.

Solution

When the covalent bond breaks, electrons are freed from atom. The departure of electron from valence band creates vacancy in bond, this vacancy is known as hole. Hence, a hole is an unfilled covalent bond.