Semiconductor Electronics: Materials, Devices and Simple Circuits Test 35

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Semiconductor Electronics: Materials, Devices and Simple Circuits Test 35

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Question 1
1 / -0

The logic circuit as shown below has the input wave forms $$A$$ and $$B$$ as shown. Pick out the correct output waveform.

A

B

C

D

Solution

It is an AND gate whose Truth Table is given above.
Hence, for given input waveforms, the output waveform is correctly shown in option A.
Question 2
1 / -0

By adding certain impurities to in the appropriate concentrations the conductivity can be well-controlled.

A
semiconductors

B
conductors

C
insulators

D
superconductors

Solution

Semiconductors which are pure, has very low conductivity. So impurities are added to a semiconductor to increase the conductivity.
Question 3
1 / -0

When you have a P-N junction and you connect it to a DC voltage, this will lead

A
The electrons near to the gap between the P-N junction from the N type material to move to the P side

B
The lack of electrons in the N type side will lead to have a holes

C
The holes near to the gap between the P-N junction from the P type material to move to the N side

D
Both A and C

Solution

When you have a $$p-n$$ junction and we connect it to a DC voltage, this will lead to:
1. When the $$N-$$type semiconductor and $$p-$$type semiconductor materials are first joined together a very large density gradient exits between both sides of the $$P-N$$ junction.
2. The results is that some of the electrons from the donar impurities atoms begin to migrate across this newly formed junction to fill up the holes in the $$P-$$type materials producing negative ions.
3. Since this electrons have moved across the $$P-N$$ junction from $$n-$$type to $$p-$$type, they leave behind positively charged donar ions on the negative across the junction in the opposite direction into the region where there are large number of free electrons.
4. As a result, the charged density of the $$P-$$type along the junction is filled with negatively charged acceptors ions, and the charges density of the $$N-$$type along the junction becomes positive.
Question 4
1 / -0

The truth table of the combination of the logic gates shown in the figure is

A

B

C

D

Solution

When inputs $$A$$ and $$B$$ entered in first $$NAND$$ gate , then output ,
$$y_{1}=\bar {(A.B)}$$
When inputs $$A$$ and $$B$$ entered in $$NOR$$ gate , then output ,
$$y_{2}=\bar {(A+B)}$$
When inputs $$y_{1}$$ and $$y_{2}$$ entered in second $$NAND$$ gate , then output ,
$$y=\bar{(\bar {A.B}).(\bar{A+B})}$$
This is the Boolean expression for the given diagram
Now , when $$A=1 ,B=0$$
  $$y=\bar{(\bar {0.0}).(\bar{0+0})}=\bar{1.1}=0$$
  when $$A=0 ,B=0$$
  $$y=\bar{(\bar {1.0}).(\bar{1+0})}=\bar{1.0}=1$$
  when $$A=0 ,B=1$$
  $$y=\bar{(\bar {0.1}).(\bar{0+1})}=\bar{0.1}=1$$
  when $$A=1 ,B=1$$
  $$y=\bar{(\bar {1.1}).(\bar{1+1})}=\bar{0.0}=1$$
Option B is correct.
Question 5
1 / -0

In this $$I-V$$ characteristic curve of a zener diode, regions 1 and 2 respectively indicate

A
forward bias and reverse bias regions.

B
reverse bias and forward bias regions.

C
forward bias regions only.

D
reverse bias regions only.

Solution

When the zener diode is connected in forward bias it acts as a normal diode.And when the reverse bias voltage is greater than a predetermined voltage then the zener breakdown voltage occur that is denoed by $$V_z$$.
And at a certain value of reverse voltage the reverse current will increase suddenly and sharply so, it clear that in this $$I-V$$ characteristic curve of a zener diode, region $$1$$ is forward bias and region $$2$$ is reverse bias region.
Question 6
1 / -0

Electrons always moves from

A
Valance band to conduction band

B
Conduction to valance band

C
Some times from valance band to conduction and sometimes from conduction band to valance band

D
None of the above

Solution
Question 7
1 / -0

The following symbol represents

A
NAND gate

B
NOT gate

C
AND gate

D
OR gate

Solution

According to the symbol shown , the inputs must be same
So $$A=B$$
Therefore the output of given symbol will be $$\overline { AB }=\overline { A}$$
Therefore the symbol represents NOT gate
So the correct option is $$B$$
Question 8
1 / -0

The logic behind NOR gate is that which gives

A
high output when both inputs are high

B
low output when both inputs are low

C
high output when both inputs are low

D
none of these

Solution

Let the inputs of NOR gate be $$a,b$$
The output of NOR gate will be $$X=\overline { a +b} $$
If $$a=0$$ and $$b=0$$ then $$X=1$$
If $$a=0$$ and $$b=1$$ then $$X=0$$
If $$a=1$$ and $$b=0$$ then $$X=0$$
If $$a=1$$ and $$b=1$$ then $$X=0$$
Therefore the output will be high when both the inputs are low
So the correct option is $$C.$$
Question 9
1 / -0

The diagram of a logic circuit is given below, the output of the circuit is represented by

A
W+(X+Y)

B
W+(X.Y)

C
W.(X+Y)

D
W.(X.Y)

Solution

Given that $$W$$ and $$X$$ are inputs of OR gate , so the output will be $$W+X$$
Given that $$W$$ and $$Y$$ are inputs of OR gate , so the output will be $$W+Y$$
Now $$W+X$$ and $$W+Y$$ are inputs for AND gate , so the out put $$F=(W+X)(W+Y)=W(1+X+Y)+XY=W+XY$$
Therefore the correct option is $$B$$
Question 10
1 / -0

In the circuit below, $$A$$ and $$B$$ represent two inputs and $$C$$ represents the output.
The circuit represents

A
$$\text{NOR gate}$$

B
$$\text{AND gate}$$

C
$$ gate$$

D
$$\text{OR gate}$$

Solution

Hint :- Write truth table of given circuit.

Explanation:-
Given, $$A$$ and $$B$$ are inputs and $$C$$ is output.
Assume that some voltage is applied across $$AB,$$
If the voltage is positive, then diode corresponding to $$A$$ will be on and the other diode will be off
$$\Rightarrow C=A$$
If the voltage is negative then diode corresponding to $$B$$ will be on and the other diode will be off
$$\Rightarrow C=B$$
Therefore we can say that $$C=A or B$$
Therefore it acts like $$OR$$ gate.
Hence option D is correct