Semiconductor Electronics: Materials, Devices and Simple Circuits Test 41

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Semiconductor Electronics: Materials, Devices and Simple Circuits Test 41

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Weekly Quiz Competition

Question 1
1 / -0

The following truth table is for which gate ?
A B Y=A + B
0 0 0
0 1 1
1 0 1
1 1 1

A
AND

B
OR

C
NOR

D
NAND

Solution

R.E.F image
$$ F = A+B $$
$$ A $$ $$ B $$ $$A+B $$
$$0$$ $$0$$ $$0$$
$$0$$ $$1$$ $$1$$
$$1$$ $$0$$ $$1$$
$$1$$ $$1$$ $$1$$
Question 2
1 / -0

$$A$$ and $$B$$ are the two points on a uniform ring of radius $$r$$. The resistance of the rings is $$R$$ and $$\angle AOB = \theta$$ as shown in the figure. The equivalent resistance between points $$A$$ and $$B$$ is _____

A
$$\dfrac {R(2\pi - \theta)}{4\pi}$$

B
$$\dfrac {R\theta}{2\pi}$$

C
$$R\left (1 - \dfrac {\theta}{2\pi}\right )$$

D
$$\dfrac {R}{4\pi^{2}} (2\pi - \theta)\theta$$

Solution

Consider the ring as two parts as two resistances joined in parallel between two points $$A$$ and $$B$$, then two resistance would be
$$R_{1} = \dfrac {2\pi r} \cdot r\theta = \dfrac {R}{2\pi}\theta$$
and $$R_{2} = \dfrac {R}{2\pi r} r (2\pi - \theta)$$
$$= \dfrac {R}{2\pi} (2\pi - \theta)$$
Now, equivalent or effective resistance between $$A$$ and $$B$$
$$R_{eq} = \dfrac {R_{1}\times R_{2}}{R_{1} + R_{2}}$$
$$\Rightarrow R_{eq} = \dfrac {\dfrac {R}{2\pi}\theta \times \dfrac {R}{2\pi}(2\pi - \theta)}{\dfrac {R}{2\pi}[\theta + 2\pi - \theta]}$$
$$= \left [\dfrac {\dfrac {R^{2}\theta (2\pi - \theta)}{4\pi^{2}}}{\dfrac {2\pi R}{2\pi}}\right ]$$
$$= \dfrac {R^{2}\theta (2\pi - \theta)}{4\pi^{2}} \times \dfrac {2\pi}{2\pi R}$$
$$= \dfrac {R\theta (2\pi - \theta)}{4\pi^{2}}$$.
Question 3
1 / -0

Name the gate, which represents the Boolean expression $$Y = \overline{A\cdot B}$$

A
NAND

B
AND

C
NOT

D
NOR

Solution

Boolean equation for NAND gate is $$Y = \overline{A.B}$$
Question 4
1 / -0

The arrangement shown in figure performs the logic function of

A
OR gate

B
XNOR gate

C
AND gate

D
NAND gate

Solution
Question 5
1 / -0

The diagram of a logic gate circuit is given below. The output $$Y$$ of the circuit is represented by

A
$$A\cdot (B + C)$$

B
$$A\cdot (B\cdot C)$$

C
$$A + (B\cdot C)$$

D
$$A + (B + C)$$

Solution

Output of upper OR gate $$= A + B$$
Output of lower OR gate $$= A + C$$
Net output $$Y = (A + B)(A + C)$$
$$= AA + AC + BA + BC$$
$$= A(1 + C) + BA + BC [\because AA = A]$$
$$= A + BA + BC [\because 1 + C = 1]$$
$$= A(1 + B) + BC [\because 1 + B = 1]$$
$$= A + BC = A + (B\cdot C)$$.
Question 6
1 / -0

Consider the circuit, the current through the Zener diode is

A
$$20\ mA$$

B
$$10\ mA$$

C
$$15\ mA$$

D
$$40\ mA$$

Solution

Voltage across Zener diode is constant
$$i_{R_2}=\dfrac{20}{2000}=0.01 A$$
$$i_{R_1}=\dfrac{(40-20)}{2000}=0.01 A$$
Question 7
1 / -0

For given logic diagram, output $$F = 1$$, then inputs are:

A
$$A = 0, B = 0, C = 0$$

B
$$A = 0, B = 1, C = 0$$

C
$$A = 1, B = 1, C = 1$$

D
$$A = 0, B = 0, C = 1$$

Solution

When $$A = 0, B = 1$$ and $$C = 0$$, then output becomes $$1$$.
Question 8
1 / -0

The following circuit represents.

A
OR gate

B
XOR gate

C
AND gate

D
NAND gate

Solution

Output of upper AND gate $$=\bar{A}B$$
Output of lower AND gate $$=A\bar{B}$$
Thus, output of OR gate $$=\bar{A}B+A\bar{B}$$
This is Boolean expression for XOR gate.
Question 9
1 / -0

Which logic gates mentioned below have the output value '0' when both the inputs are 1

A
OR , NAND

B
AND , NOR

C
AND , OR

D
NOR , NAND

Solution

From the above shown logic tables, we can say that for NAND and NOR gate, we will get the output '0' when both the inputs are 1.
Question 10
1 / -0

The following logic circuit represents

A
NAND gate with output $$O=\overline { X } +\overline { Y } $$

B
NOR gate with output $$O=\overline { X+Y } $$

C
NAND gate with output $$O=\overline { X-Y } $$

D
NOR gate with output $$O=\overline { X } .\overline { Y } $$

Solution

The given logic circuit is the combination of OR and NOT gates. So it should be the NOR gate. Besides, the NAND gate is the combination of AND and NOT gates.
The output of NOR gate will be $$O=\overline{X+Y}$$ and output of the NAND gate will be $$O=\overline{XY}=\overline X+\overline Y$$ (by de Morgan's law)