Self Studies
Self Studies
Self Studies
Self Studies

Digital Electro...

TIME LEFT -
  • Question 1
    1 / -0

    D input of a clocked D-flip-flop receives and input A ⊕ Qn where A is an external logic input and Qn is the output of the nth D-FF before the clock appears. The circuit works as

  • Question 2
    1 / -0

    The clock frequency of 12 MHz is applied to a cascaded counter of modulus-4 counters, modulus-5 counters and modulus-6 counters.

  • Question 3
    1 / -0

    An X-Y flip-flop whose characteristic table is given below is to be implemented using a J-K flip-flop

    X

    Y

    Qn+1

    0

    0

    1

    0

    1

    Qn

    1

    0

    Q̅n

    1

    1

    0

     

    This can be done using-

Submit Test
Self Studies
User
Question Analysis

  • Answered - 0

  • Unanswered - 3

  • 1
  • 2
  • 3
Submit Test
Self Studies Get latest Exam Updates
& Study Material Alerts!
No, Thanks
Self Studies
Click on Allow to receive notifications
Allow Notification
Self Studies
Self Studies Self Studies
To enable notifications follow this 2 steps:
  • First Click on Secure Icon Self Studies
  • Second click on the toggle icon
Allow Notification
Get latest Exam Updates & FREE Study Material Alerts!
Self Studies ×
Open Now