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Digital Logic T...

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  • Question 1
    1 / -0

    A sequential circuit counts from 0 to 255 using JK flip-flop. If the propagation delay of each flip flop is 50 ns, the maximum clock frequency that can be used is _____ MHz

  • Question 2
    1 / -0

    An Up-counter with 10 flip-flops is initially set zeros in all the flip flops; after 1050 clock pulses the binary number in the counter is

  • Question 3
    1 / -0

    What is the minimum number of flip flops needed to construct a binary modulo 1026 counters?

  • Question 4
    1 / -0

    A new flipflop with inputs X and Y, has the following property

    Inputs

    Current state

    Next state

    X

    Y

    0

    0

    Q

    1

    0

    1

    Q

    Q̅

    1

    1

    Q

    0

    1

    0

    Q

    Q

     

    Which of the following expresses the next state in terms of X, Y, current state?

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