Digital Electronics Test 2

Question 1
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Consider the equation (146)_b + (313)_b-2 = (246)₈. Which of the following is the value of b?

A
8

B
7

C
10

D
16

Question 2
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The enable input is also known as ___________

A
Select input

B
Decoded input

C
Strobe

D
Sink

Question 3
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The clock frequency of 12 MHz is applied to a cascaded counter of modulus-4 counter, modulus-5 counter and modulus-6 counter.

A
The overall modulus of the cascaded counter is 60

B
The lowest output frequency of the cascaded counter is 100 kHz

C
The overall modulus of the cascaded counter is 120

D
The lowest output frequency of the cascaded counter is 200 kHz

Question 4
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Which combinational circuit is renowned for selecting a single input from multiple inputs & directing the binary information to output line?

A
Data Selector

B
Data distributor

C
Both data selector and data distributor

D
De Multiplexer

Question 5
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Which is the major functioning responsibility of the multiplexing combinational circuit?

A
Decoding the binary information

B
Generation of all minterms in an output function with OR-gate

C
Generation of selected path between multiple sources and a single destination

D
Encoding of binary information

Question 6
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The Elevator door should open if the elevator is stopped and is level with the floor, and the timer has not expired, ‘OR’ if the elevator is stopped and is level with the floor, and a button is pressed. If
D→ Elevator door opens
S→ Elevator is stopped
F→ Level with the floor
T→ Timer has expired
B→ Button Pressed
Which of the Boolean expression represents the above condition:

A
D = SFT̅ + SFB

B
D = SFT̅B

C
D = SF + T̅B

D
D = (S + F) (T̅B)

Question 7
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If there are p input lines and q output lines for a decoder that is used to uniquely address a byte-addressable 64 KB RAM, then the minimum value of p + q is ______.

A
65552-65552

B
655524-655521

C
655527-655526

D
655529-655522

Question 8
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The resolution of a 4-bit counting ADC is 0.5 V. For an analog input of 5.1 V, the digital output of the ADC and the maximum conversion time for 0.5 MHz clock frequency are

A
1011, 30 μs

B
1101, 30 μs

C
1101, 8 μs

D
1011, 8 μs

Question 9
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One multiplexer can take the place of ___________

A
Several SSI logic gates

B
Combinational logic circuits

C
Several Ex-NOR gates

D
Several SSI logic gates or combinational logic circuits

Question 10
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The word demultiplex means ___________

A
One into many

B
Many into one

C
Distributor

D
One into many as well as Distributor

Question 11
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Most demultiplexers facilitate which type of conversion?

A
Decimal-to-hexadecimal

B
Single input, multiple outputs

C
AC to DC

D
Odd parity to even parity

Question 12
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In a multiplexer the output depends on its ___________

A
Data inputs

B
Select inputs

C
Select outputs

D
Enable pin

Question 13
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How many AND gates are required for a 1-to-8 multiplexer?

A
2

B
6

C
8

D
5

Question 14
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Which IC is used for the implementation of 1-to-16 DEMUX?

A
IC 74154

B
IC 74155

C
IC 74139

D
IC 74138

Question 15
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Why is a demultiplexer called a data distributor?

A
The input will be distributed to one of the outputs

B
One of the inputs will be selected for the output

C
The output will be distributed to one of the inputs

D
Single input to Single Output

Question 16
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In 1-to-4 demultiplexer, how many select lines are required?

A
2

B
3

C
4

D
5

Question 17
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A 4-bit successive approximation type of Analog to digital converter has an input range of 0 to 15 V. The output bit b₁ next to the LSB has a stuck at zero fault. For which of the following voltages, it produces the same output codeword.

A
1 V

B
2 V

C
4 V

D
6 V

Question 18
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How many AND gates are required for a 1-to-8 multiplexer?

A
2

B
6

C
8

D
5

Question 19
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The output Q₄ of this 1-to-8 demultiplexer is ____________

A
_S2.(S₁)’.S₀.I

B
S₂.S₁.(S₀)’.I

C
S₂.(S₁)’.(S₀)’.I

D
S₂.(S₁).S₀.I

Question 20
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In a zener diode large reverse current is due to

A
presence of impurity

B
lower resistance in reverse biased region

C
rupture of bonds

D
collision

Question 21
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For thermionic emission

A
a material with low work function is preferable.

B
a material with high work function is preferable.

C
the work function of the material has no importance.

D
none of the above

Question 22
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When forward bias is applied to a junction diode, it

A
reduces the majority - carrier current to zero

B
reduces the minority - carrier current to zero

C
increases the potential barrier

D
decreases the potential barrier

Question 23
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The main reason why electrons can tunnel through a p-n junction is that

A
barrier potential is very low

B
they have high energy

C
impurity level is low

D
depletion layer is extremely thin

Question 24
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The forbidden energy gap in semiconductors

A
lies just above the conduction band

B
lies just below the valence band

C
is the same as the valence band

D
lies between the valence band and the conduction band

Question 25
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With the increase in temperature, the resistivity of an intrinsic semiconductor decreases. This is because, with the increase of temperature

A
the carrier concentration decreases, but the mobility of carriers increases.

B
the carrier concentration increases, but the mobility of carriers decreases.

C
the carrier concentration remains the same but the mobility of carriers decreases.

D
both the carrier concentration and mobility of carriers decreases

Submit Test

Digital Electro...

Question 1

8

7

10

16

Question 2

Select input

Decoded input

Strobe

Sink

Question 3

The overall modulus of the cascaded counter is 60

The lowest output frequency of the cascaded counter is 100 kHz

The overall modulus of the cascaded counter is 120

The lowest output frequency of the cascaded counter is 200 kHz

Question 4

Data Selector

Data distributor

Both data selector and data distributor

De Multiplexer

Question 5

Decoding the binary information

Generation of all minterms in an output function with OR-gate

Generation of selected path between multiple sources and a single destination

Encoding of binary information

Question 6

D = SFT̅ + SFB

D = SFT̅B

D = SF + T̅B

D = (S + F) (T̅B)

Question 7

65552-65552

655524-655521

655527-655526

655529-655522

Question 8

1011, 30 μs

1101, 30 μs

1101, 8 μs

1011, 8 μs

Question 9

Several SSI logic gates

Combinational logic circuits

Several Ex-NOR gates

Several SSI logic gates or combinational logic circuits

Question 10

One into many

Many into one

Distributor

One into many as well as Distributor

Question 11

Decimal-to-hexadecimal

Single input, multiple outputs

AC to DC

Odd parity to even parity

Question 12

Data inputs

Select inputs

Select outputs

Enable pin

Question 13

2

6

8

5

Question 14

IC 74154

IC 74155

IC 74139

IC 74138

Question 15

The input will be distributed to one of the outputs

One of the inputs will be selected for the output

The output will be distributed to one of the inputs

Single input to Single Output

Question 16

2

3

4

_S2.(S₁)’.S₀.I

S₂.S₁.(S₀)’.I

S₂.(S₁)’.(S₀)’.I

S₂.(S₁).S₀.I